(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of preventing source/drain defects and preventing gate to source/drain bridging during salicidation in the fabrication of integrated circuits.
(2) Description of the Prior Art
In the fabrication of integrated circuits, a silicide is often formed overlying a structure to be contacted by a higher level conducting layer. A silicide is often formed on top of a polysilicon gate and overlying the source and drain regions within a substrate. Typically, a titanium layer is deposited over the wafer. The wafer is subjected to a thermal process which causes the underlying silicon to react with the titanium layer to form titanium silicide. FIG. 1 illustrates a partially completed integrated circuit device of the prior art. A gate electrode 16 has been formed on the surface of a semiconductor substrate 10. Source and drain regions 20 have been formed within the substrate. Sidewall spacers 18 are typically composed of silicon dioxide or silicon nitride. A layer of titanium 24 is deposited over the surface of the wafer. A rapid thermal process causes the silicon atoms within the polysilicon gate and the substrate to diffuse into the titanium layer and react with the titanium to form titanium silicide 26, as illustrated in FIG. 2. The titanium layer 24 over the sidewall spacers 18 and the field oxide regions 12 is not reacted and can be removed easily. However, silicon from the gate and from the substrate can diffuse into the titanium layer overlying the sidewall spacers causing titanium silicide to form overlying the spacers as well. This is the so-called bridging problem. The titanium silicide layer over the spacers shorts the source/drain to the gate leading to malfunction of the device.
Also, if the titanium silicide 26 grows too thick, the interface between the titanium silicide 26 and the silicon 10 will be very rough, causing spiking through the source/drain junction, as indicated by 27. This will cause junction leakage. Furthermore, the thicker the titanium silicide, the higher the stress underlying the titanium silicide layer. This high stress results in silicon lattice defects 29 near the junction, leading to junction leakage also.
In an attempt to solve the bridging problem, Arsenic has been implanted into the substrate before the titanium layer is deposited to suppress bridging. However, the large mass of the Arsenic implant will damage the silicon and cause it to become amorphous. U.S. Pat. No. 5,508,212 to Wang et al teaches large angle implantation of nitrogen into the titanium layer to form titanium nitride in the upper portion of the titanium layer over the gate and the source/drain regions and within the whole of the titanium layer over the sidewall spacers thus preventing formation of titanium silicide over the spacers. U.S. Pat. No. 5,330,921 to Yoshida et al teaches depositing a titanium film, then an amorphous silicon film over a planned source/drain region. A rapid thermal process with nitrogen forms titanium silicide under the amorphous silicon layer. The source/drain regions are formed by implanting through the titanium silicide and amorphous silicon films wherein the implantation is within a specific dosage range dependent on the titanium silicide thickness in order to form shallow junctions. U.S. Pat. No. 5,835,112 to Pfiester et al also form shallow junctions by implanting germanium before the titanium deposition and salicidation. Ions are implanted through the titanium silicide to form source/drain regions wherein the germanium reduces the diffusion allowing for shallow junctions. U.S. Pat. No. 5,444,024 to Anjum et al teaches deposition of Argon ions after titanium deposition so as to reduce silicide growth over the source/drain regions. This allows the thickness of the titanium silicide layer to be controlled in order to reduce defects.